VYUsync’s HEVC 4Kp60, 4:2:2, 10-bit Decoder Core is a highly optimized universal video ... The IO interface comprises of an input FIFO and an output frame buffer. Decoded data can also be provided on ...
Both encoders also feature fully-interlaced video, alarm inputs and relay outputs, and pan/tilt/zoom control. The new high-performance Single/Quad Stream VIP XD decoder allows video to be received and ...
This is a CCSDS compatible 16 state error control turbo decoder with optional synchronisation, optional descrambling and input memory. The PCD04CH offers unparalleled ...
Some results have been hidden because they may be inaccessible to you
Show inaccessible results
Feedback