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Design-Reuse
5 天
How JESD204 Self-Synchronizing Receiver works: An in-depth look
The JESD204 Standard has undergone several iterations since its initial release in April 2006, the Serdes capabilities and ...
Design-Reuse
4 天
Bigger Chips, More IPs, and Mounting Challenges in Addressing the Growing Complexity of SoC ...
As the semiconductor industry pushes the boundaries of innovation, modern system-on-chip (SoC) designs are growing ...
Design-Reuse
4 天
Certus releases radiation-hardened I/O Library in GlobalFoundries 12nm LP/LP+
Certus Semiconductor is pleased to announce that it has begun 2025 with the delivery of a radiation-hardened by design I/O ...
Design-Reuse
3 天
Ceva, Inc. Appoints Amir Faintuch to its Board of Directors
Ceva today announced the appointment of Amir Faintuch, a seasoned technology executive, to its Board of Directors as an ...
Design-Reuse
4 天
intoPIX and Nextera-Adeas Announce Latest IPMX Demo Design with JPEG XS on Compact FPGAs at ...
PIX, the pioneering provider of lightweight compression solutions, is thrilled to continue its collaboration with Nextera ...
Design-Reuse
4 天
D&R Headline News (Last 14 Days)
Andes Technology today announced that its D45-SE processor has successfully achieved ISO 26262 ASIL-D with the certification of SGS TÜV. This certification marks a significant achievement for Andes ...
Design-Reuse
4 天
Mixel Announces the Opening of New Branch in Da Nang, Vietnam
This office represents a key milestone for Mixel as its first in Asia. It will enable Mixel to expand its engineering talent, ...
Design-Reuse
3 天
intoPIX and EvertzAV Strengthen IPMX AV-over-IP Interoperability with Groundbreaking JPEG ...
PIX, the leader in innovative image processing and compression technologies, is proud to announce the integration of its ...
Design-Reuse
13 天
Accelerating RISC-V development with Tessent UltraSight-V
Siemens’ longstanding and deep engagement with the RISC-V community dates back to the foundation’s early days. Involved ...
Design-Reuse
10 天
VeriSilicon and Innobase collaboratively launched second-generation Yunbao series 5G RedCap ...
VeriSilicon (688521.SH) today announced the joint launch of the second-generation Yunbao series 5G RedCap/4G LTE dual-mode ...
Design-Reuse
12 天
UCIe for 1.6T Interconnects in Next-Gen I/O Chiplets for AI data centers
The rise of generative AI is pushing the limits of computing power and high-speed communication, posing serious challenges as ...
Design-Reuse
12 天
Alphawave Semi to Lead Chiplet Innovation, Showcase Advanced Technologies at Chiplet Summit
Partnering with industry giants such as Arm and Keysight, Alphawave Semi will highlight its leadership in UCIe, HBM, and next ...
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